This invention relates to decoding circuits for converting coded information into an uncoded format.
In many digital systems (e.g. memories, computers, etc.) information is encoded to reduce the number of signal carrying lines and to provide a compact and efficient way of routing information from one section of a system to another section or from one system to another. For example, using the Binary Coded Decimal (BCD) code, N lines carrying binary coded information include 2.sup.N unique combinations of the signals on the N lines. Thus, only N lines are needed to carry 2.sup.N different commands. However, at some point it is necessary to decode the information on the N lines. For example, this may occur where the data on the N lines is to be used for uniquely selecting one of many word or bit lines of a memory array.
The binary information contained on the N lines must then be separated to produce 2.sup.N unique outputs, with each output representing a particular combination of the N binary inputs signals, and with each output being excited (e.g. logic "1") for only one particular combination of the N input signals. To optimize the benefits of decoding, it is important that the decoding circuitry be compact, use few components and consume small amounts of power.